Fast clock-jitter simulation in continuous-time Delta-Sigma modulators
نویسندگان
چکیده
A new methodology for clock-jitter simulation in continuous-time sigma-delta (Σ∆) converters is proposed. This analysis method, based on a previously published method uses a discrete time simulator, more efficient than an analog simulator. Only one sample per output sample is required, which reduces simulation times to a few seconds, even for large simulations. Results will be compared to those obtained with time-domain state-equations integration.
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